Počet záznamů: 1

Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors

  1. 1.
    0363714 - UTIA-B 2012 RIV FI eng C - Konferenční příspěvek (zahraniční konf.)
    Sýkora, Jaroslav - Kafka, Leoš - Daněk, Martin - Kohout, Lukáš
    Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors.
    2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011. Oulu, Finsko: IEEE Computer Society Conference Publishing Services, 2011 - (Kitsos, P.), s. 525-532. ISBN 978-0-7695-4494-6. ISSN N.
    [14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011. Oulu (FI), 31.08.2011-02.09.2011]
    Grant CEP: GA MŠk 7E08013
    Výzkumný záměr: CEZ:AV0Z10750506
    Klíčová slova: microthreading * SVP concurrency model * UTLEON3 processor
    Kód oboru RIV: JC - Počítačový hardware a software
    http://library.utia.cas.cz/separaty/2011/ZS/sykora-microthreading as a novel method for close coupling of custom hardware accelerators to svp processors.pdf http://library.utia.cas.cz/separaty/2011/ZS/sykora-microthreading as a novel method for close coupling of custom hardware accelerators to svp processors.pdf

    We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accelerators from software. The scheme is based on the Self-adaptive Virtual Processor (SVP) architecture and on the micro-threading concept. Our presentation is based on a sample implementation of the SVP architecture in an extended version of the LEON3 processor called UTLEON3. The SVP concurrency paradigm makes data dependencies explicit in the dynamic tree of threads. This enables a system to execute threads concurrently in different processor cores. Previous SVP work presumed the cores are homogeneous, for example an array of microthreaded processors sharing a dynamic pool of microthreads. In this work we propose a heterogeneous system of general-purpose processor cores and custom hardware accelerators. The accelerators dynamically pick families of threads from the pool and execute them concurrently.
    Trvalý link: http://hdl.handle.net/11104/0199416