Počet záznamů: 1
A Compact Front-End Circuit for a Monolithic Sensor in a 65-nm CMOS Imaging Technology
- 1.0577059 - ÚJF 2024 RIV US eng J - Článek v odborném periodiku
Piro, F. - Aglieri Rinella, G. - Andronic, A. - Antonelli, M. - Aresti, M. - Baccomi, R. - Isakov, Artem - Kotliarov, Artem - Křížek, Filip … celkem 55 autorů
A Compact Front-End Circuit for a Monolithic Sensor in a 65-nm CMOS Imaging Technology.
IEEE Transactions on Nuclear Science. Roč. 70, č. 9 (2023), s. 2191-2200. ISSN 0018-9499. E-ISSN 1558-1578
Grant CEP: GA MŠMT LM2023040
Institucionální podpora: RVO:61389005
Klíčová slova: Front-end circuits * low-power circuits * monolithic active pixel sensors (MAPSs)
Obor OECD: Nuclear physics
Impakt faktor: 1.8, rok: 2022
Způsob publikování: Open access
https://doi.org/10.1109/TNS.2023.3299333
This article presents the design of a front-end circuit for monolithic active pixel sensors (MAPSs). The circuit operates with a sensor featuring a small, low-capacitance (<2 fF) collection electrode and is integrated into the DPTS chip, a proof-of-principle prototype of 1.5 x 1.5 mm including a matrix of 32 x 32 pixels with a pitch of 15 mu m. The chip is implemented in the 65-nm imaging technology from the Tower Partners Semiconductor Company foundry and was developed in the framework of the EP-Research and Development Program at CERN to explore this technology for particle detection. The front-end circuit has an area of 42 mu m(2) and can operate with power consumption as low as 12 nW. Measurements on the prototype relevant to the front end will be shown to support its design.
Trvalý link: https://hdl.handle.net/11104/0346326
Název souboru Staženo Velikost Komentář Verze Přístup 0577059.pdf 0 3.9 MB CC licence Vydavatelský postprint povolen
Počet záznamů: 1