ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA

0499963 - ÚTIA 2020 RIV US eng J - Článek v odborném periodiku
Hoozemans, J. - Van Straten, J. - Viitanen, T. - Tervo, A. - Kadlec, Jiří - Al-Ars, Z.
ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA.
Journal of Signal Processing Systems for Signal Image and Video Technology. Roč. 91, č. 1 (2019), s. 61-73. ISSN 1939-8018. E-ISSN 1939-8115
Grant CEP: GA MŠMT 7H14004
Klíčová slova: ALMARVI * OpenCL * pocl * TTA * TCE * rVEX * ZYNQ
Obor OECD: Computer hardware and architecture
Impakt faktor: 1.013, rok: 2019
Způsob publikování: Open access
http://library.utia.cas.cz/separaty/2019/ZS/kadlec-0499963.pdf https://link.springer.com/article/10.1007%2Fs11265-018-1424-1

The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (ρ-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.
Trvalý link: http://hdl.handle.net/11104/0292833