Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping

0411202 - UTIA-B 20030189 RIV US eng C - Konferenční příspěvek (zahraniční konf.)
Pohl, Zdeněk - Schier, Jan - Líčko, Miroslav - Heřmánek, Antonín - Tichý, Milan
Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping.
Los Alamitos: IEEE Computer Society Press, 2003. ISBN 0-7695-1926-1. In: Proceedings of the International Parallel and Distributed Processing Symposium. IPDPS 2003. - (Werner, B.), s. 1-6
[IEEE IPDPS 2003. Nice (FR), 22.04.2003-26.04.2003]
Grant CEP: GA MŠMT LN00B096
Grant ostatní: Commission EC(XE) IST-2001-34016
Výzkumný záměr: CEZ:AV0Z1075907
Klíčová slova: high speed logarithmic arithmetic * Matlab/Simulink * rapid prototyping
Kód oboru RIV: JC - Počítačový hardware a software

The paper is focused on the rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using the Xilinx system Generator is reviewed on an example of the High Speed Logaritmic Arithmetic unit. An alternative approach using the combination of the real time workshop with the Handel C compiler for automatized generation of the HDL code is presented. The possibilities to extend this solution in order to support the run-time reconfigurations are outlined.
Trvalý link: http://hdl.handle.net/11104/0131288