Počet záznamů: 1
Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program)
- 1.0411193 - UTIA-B 20030180 RIV CZ eng E - Elektronický dokument
Pohl, Zdeněk - Kadlec, Jiří - Líčko, Miroslav - Matoušek, Rudolf - Tichý, Milan
Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 32 MB
Grant CEP: GA MŠMT LN00B096
Výzkumný záměr: CEZ:AV0Z1075907
Klíčová slova: RLS Lattice * FPGA * noise cancelation
Kód oboru RIV: JC - Počítačový hardware a software
A demo for XSV-800 board from XESS corporation. A 10-bit logarithmic arithmetic is used for implementation of a high performance DSP application. It is performing noise cancelation for audio signals from audiocodec inputs and wieting output to the audio output. The demo is possible to be downloaped from the UTIA website.
Trvalý link: http://hdl.handle.net/11104/0131279
Počet záznamů: 1