Using logarithmic arithmetic for FPGA implementation of the Givens rotations

0411123 - UTIA-B 20030110 RIV ES eng C - Konferenční příspěvek (zahraniční konf.)
Schier, Jan - Kadlec, Jiří
Using logarithmic arithmetic for FPGA implementation of the Givens rotations.
Vigo: Universidade de Vigo, 2003. ISBN 84-8158-248-4. In: Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications. - (Mosquera, C.; Perez-Gonzales, F.), s. 199-204
[Baiona Workshop on Signal Processing Communications /6./. Baiona (ES), 08.09.2003-10.09.2003]
Grant CEP: GA MŠMT LN00B096
Grant ostatní: EU IST(XE) IST-2001-34016
Výzkumný záměr: CEZ:AV0Z1075907
Klíčová slova: FPGA * logarithmic arithmetic * Givens rotations
Kód oboru RIV: JC - Počítačový hardware a software

In this paper we describe an implementation of the Given rotations using the High speed logarithmic arithmetic (HSLA) library. This library is used for an efficient implementation of the floating-point arithmetic operation in FPGA (including the square root operation). The library was used to implement Given rotations in the Xilinx XCV2000E. The implementation was realised using some rapid prototyping tools for signal processing applications and for the FPGA design.
Trvalý link: http://hdl.handle.net/11104/0131210