Search results
- 1.0411208 - UTIA-B 20030195 RIV CZ eng E - Electronic Document
Líčko, Miroslav - Matulík, Radim - Matoušek, Rudolf - Kadlec, Jiří
Prototyping Board for CAK. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 150 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * hardware prototyping
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131294 - 2.0411205 - UTIA-B 20030192 RIV CZ eng E - Electronic Document
Líčko, Miroslav - Kadlec, Jiří
An Introduction to the Xilinx System Generator. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 67.3 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * rapid prototyping * design methodology
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131291 - 3.0411203 - UTIA-B 20030190 RIV CZ eng E - Electronic Document
Matoušek, Rudolf - Líčko, Miroslav - Kadlec, Jiří
European Logarithmic Microprocessor. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 46.5 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : ELM * ELM * FPGA
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131289 - 4.0411193 - UTIA-B 20030180 RIV CZ eng E - Electronic Document
Pohl, Zdeněk - Kadlec, Jiří - Líčko, Miroslav - Matoušek, Rudolf - Tichý, Milan
Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 32 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : RLS Lattice * FPGA * noise cancelation
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131279 - 5.0411191 - UTIA-B 20030178 RIV CZ eng E - Electronic Document
Pohl, Zdeněk - Kadlec, Jiří - Tichý, Milan
RLS Lattice - Celoxica RC200 Demo. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 31.5 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : RLS Lattice * FPGA * noise cancelation
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131277 - 6.0083363 - ÚTIA 2008 RIV CZ cze E - Electronic Document
Svozil, Jiří - Stejskal, Jaroslav - Kafka, Leoš - Kadlec, Jiří
PicoBlaze lekce 3: sériová komunikace RS232 a testování IP jader pomocí procesoru PicoBlaze.
[PicoBlaze lesson 3: serial communication RS232 and testing IP cores by PicoBlaze processor.]
[program]. - Praha: ÚTIA AV ČR, 2007, 9MB
R&D Projects: GA MŠMT 2C06008
Institutional research plan: CEZ:AV0Z10750506
Keywords : PicoBlaze * IP cores * serial communication
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0146627 - 7.0080727 - ÚTIA 2007 RIV CZ cze E - Electronic Document
Stejskal, Jaroslav - Kafka, Leoš - Kadlec, Jiří
PicoBlaze lekce 2: generování VHDL a implementace systému s procesorem PicoBlaze do FPGA v prostředí Xilinx ISE.
[PicoBlaze lesson 2: Creation and implementation of PicoBlaze-based system in FPGA using Xilinx ISE.]
[program]. - Praha: ÚTIA AV ČR, 2007, 13 MB
R&D Projects: GA MŠMT 2C06008
Institutional research plan: CEZ:AV0Z10750506
Keywords : FPGA * PicoBlaze processor * integrated circuit * VHDL
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0144817 - 8.0080726 - ÚTIA 2007 RIV CZ cze E - Electronic Document
Svozil, Jiří - Kafka, Leoš - Kadlec, Jiří
PicoBlaze lekce 1: assembler, C překladač a simulační prostředí.
[PicoBlaze lesson 1: assembler, compiler and simulator.]
[program]. - Praha: ÚTIA AV ČR, 2007, 2 MB
R&D Projects: GA MŠMT 2C06008
Institutional research plan: CEZ:AV0Z10750506
Keywords : FPGA * PicoBlaze processor * integrated circuit
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0144816 - 9.0053712 - ÚTIA 2007 RIV CZ eng E - Electronic Document
Pohl, Zdeněk - Kadlec, Jiří
RLS Lattice Demo.
[RLS Lattice Demo.]
[demo aplikace]. - Praha: ÚTIA AV ČR, 2006, 7147638 B
R&D Projects: GA MŠMT(CZ) 1M0567
Institutional research plan: CEZ:AV0Z10750506
Keywords : filtering * adaptive * FPGA * LNS
Subject RIV: IN - Informatics, Computer Science
Permanent Link: http://hdl.handle.net/11104/0141894 - 10.0026149 - ÚTIA 2006 RIV CZ eng E - Electronic Document
Kadlec, Jiří
Scalable Floating Point Simulation Package float-dk-rel2. (Program).
[Simultor škálovatelných modulů aritmetiky v plovoucí řádové čárce.]
[program]. - Praha: ÚTIA AV ČR, 2005, 4.98 MB
R&D Projects: GA MŠMT(CZ) 1M0567; GA AV ČR(CZ) 1ET400750406
Institutional research plan: CEZ:AV0Z10750506
Keywords : arithmetics * bit-exact modeling precision
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0116442