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0391639 - ÚTIA 2014 RIV CZ eng C - Conference Paper (international conference)
Sýkora, Jaroslav
Composing Data-driven Circuits Using Handshake in the Clock-Synchronous Domain.
Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Brno: IEEE, 2013, s. 211-214. ISBN 978-1-4673-6133-0.
[2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Karlovy Vary (CZ), 08.04.2013-10.04.2013]
Institutional support: RVO:67985556
Keywords : clock-synchronous hardware * field programmable gate arrays * Flow-Transfer Level
Subject RIV: JC - Computer Hardware ; Software
http://library.utia.cas.cz/separaty/2013/ZS/sykora-composing data-driven circuits using handshake in the clock-synchronous domain.pdf
Permanent Link: http://hdl.handle.net/11104/0220654

0382184 - ÚTIA 2013 RIV FR eng C - Conference Paper (international conference)
Bartosinski, Roman - Daněk, Martin - Sýkora, Jaroslav - Kohout, Lukáš - Honzík, P.
Video Surveillance Application Based on Application Specific Vector Processors.
Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing. Gières: Electronic Chips & Systems design Initiative, 2012 - (Morawiec, A.; Hinderscheit, J.), s. 248-255. ISBN 978-2-9539987-2-6. ISSN 1966-7116.
[Conference on Design & Architectures for Signal & Image Processing. Karlsruhe (DE), 23.10.2012-25.10.2012]
R&D Projects: GA MŠMT(CZ) 7H10001
Institutional support: RVO:67985556
Keywords : video surveillance * smart camera * custom accelerators * vector processing * FPGA
Subject RIV: JC - Computer Hardware ; Software
http://library.utia.cas.cz/separaty/2012/ZS/bartosinski-0382184.pdf
Permanent Link: http://hdl.handle.net/11104/0212479

0376595 - ÚTIA 2013 RIV EE eng C - Conference Paper (international conference)
Sýkora, Jaroslav - Kohout, Lukáš - Bartosinski, Roman - Kafka, Leoš - Daněk, Martin - Honzík, P.
The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Processor.
Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Tallinn, ESTONIA: IEEE, 2012 - (Raik, J.; Stopjaková, V.; Jenihhin, M.; Vierhaus, H., T.; Pleskacz, W.; Ubar, R.), s. 62-67. ISBN 978-1-4673-1185-4.
[2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Tallinn (EE), 18.04.2012-20.04.2012]
R&D Projects: GA MŠMT(CZ) 7H10001
Institutional research plan: CEZ:AV0Z10750506
Keywords : custom accelerators * vector processing * FPGA
Subject RIV: JC - Computer Hardware ; Software
http://library.utia.cas.cz/separaty/2012/ZS/sykora-0376595.pdf
Permanent Link: http://hdl.handle.net/11104/0208954

0357150 - ÚTIA 2011 RIV IT eng C - Conference Paper (international conference)
Sýkora, Jaroslav - Kafka, Leoš - Daněk, Martin - Kohout, Lukáš
Analysis of Execution Efficiency in the Microthreaded Processor UTLEON3.
Architecture of Computing Systems - ARCS 2011. Berlin: Springer-Verlag Berlin Heidelberg, 2011 - (Berekovic, M.), s. 110-121. Lecture Notes in Computer Science - LNCS, 6566. ISBN 978-3-642-19136-7. ISSN 0302-9743.
[ARCS 2011. International Conference on Architecture of computing systems /24./. Camo (IT), 24.02.2011-25.02.2011]
R&D Projects: GA MŠMT 7E08013
Grant - others:European Commission(XE) FP7-ICT-215215
Institutional research plan: CEZ:AV0Z10750506
Keywords : Processor architectures * Multi-threading
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0195483