Search results
- 1.0411508 - ÚTIA 2010 RIV GR eng C - Conference Paper (international conference)
Heřmánek, Antonín - Schier, Jan - Šůcha, P. - Hanzálek, Z.
Optimization of finite interval CMA implementation for FPGA.
[Optimalizace FPGA implementace FI-CMA algoritmu.]
0-7803-9334-1. In: Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005. Athens: IEEE, 2005, s. 1-6. ISBN 0-7803-9333-3.
[SiPS 2005. IEEE Workshop on Signal Processing Systems. Athens (GR), 02.11.2005-04.11.2005]
R&D Projects: GA AV ČR 1ET300750402; GA MŠMT 1M0567
Institutional research plan: CEZ:AV0Z10750506
Keywords : CMA * FPGA * logarithmic arithmetic * cyclic scheduling
Subject RIV: BD - Theory of Information
Permanent Link: http://hdl.handle.net/11104/0131588 - 2.0089564 - ÚTIA 2008 RIV US eng C - Conference Paper (international conference)
Bartosinski, Roman - Hanzálek, Z. - Stružka, P. - Waszniowski, L.
Integrated Environment for Embedded Control Systems Design.
[integrované zařízení pro vložený kontrolní systém nákresu.]
Proceedings of the 21st IEEE International Parallel & Distributed Processing Symposium. Los Alamitos, CA: IEEE Computer Society, 2007, s. 1-8. ISBN 1-4244-0909-8.
[21st IEEE International Parallel & Distributed Processing Symposium. Long Beach (US), 26.03.2007-30.03.2007]
R&D Projects: GA AV ČR 1ET400750406
Institutional research plan: CEZ:AV0Z10750506
Keywords : Code generation * Model based design * Processor Expert * Simulink
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0150738 - 3.0089531 - ÚTIA 2008 RIV US eng C - Conference Paper (international conference)
Bartosinski, Roman - Hanzálek, Z. - Waszniowski, L. - Stružka, P.
Processor Expert Enhances Matlab Simulink Facilities for Embedded Software Rapid Development.
[Zpracovatel odborného zvýšení Matlab Simulinkové možnosti pro vložený software rychlého vývoje.]
Emerging Technologies and Factory Automation 2006. Piscataway: IEEE, 2006, s. 1-4. ISBN 0-7803-9758-4.
[IEEE Conference on Emerging Technologies and Factory Automation 2006. Prague (CZ), 20.09.2006-22.09.2006]
R&D Projects: GA AV ČR 1ET400750406
Institutional research plan: CEZ:AV0Z10750506
Keywords : Code generation * Model based design * Processor Expert * Simulink
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0150718 - 4.0075993 - ÚTIA 2007 RIV FR eng C - Conference Paper (international conference)
Šůcha, P. - Hanzálek, Z. - Heřmánek, Antonín - Schier, Jan
Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm.
[Efektivní FPGA implementace FI-CMA ekvalizéru.]
IEEE Symposium on Industrial Embedded Systems - IES 2006, Proceedings of. Lyon: CNRS-ENS, 2006, s. 1-10. ISBN 1-4244-0777-X.
[IEEE Symposium on Industrial Embedded Systems - IES 2006. Antibes Juan-Les-Pins (FR), 18.10.2006-20.10.2006]
R&D Projects: GA AV ČR(CZ) 1ET300750402; GA AV ČR(CZ) 1ET400750406; GA MŠMT(CZ) 1M0567
Institutional research plan: CEZ:AV0Z10750506
Keywords : high-level synthesis * cyclic scheduling * iterative algorithms * imperfectly nested loops * integer linear programming * FPGA * control
Subject RIV: JA - Electronics ; Optoelectronics, Electrical Engineering
Permanent Link: http://hdl.handle.net/11104/0143207 - 5.0026328 - ÚTIA 2006 RIV FI eng C - Conference Paper (international conference)
Pohl, Zdeněk - Kadlec, Jiří - Šůcha, P. - Hanzálek, Z.
Performance tuning of interative algorithms in signal processing.
[Ladění výkonu iterativních algoritmů pro zpracování signálu.]
Proseedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005. Tampere: Academy of Finland, 2005 - (Rissa, T.; Wilton, S.; Leong, P.), s. 699-702. ISBN 0-7803-9362-7.
[FPL 2005. International Conference on Field Programmable Logic and Applications. Tampere (FI), 24.08.2005-26.08.2005]
R&D Projects: GA AV ČR(CZ) 1ET300750402; GA MŠMT(CZ) 1M0567
Institutional research plan: CEZ:AV0Z10750506
Keywords : signal processing * FPGA * high speed logarithmic arithmetic
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0116596