Search results
- 1.0106381 - UTIA-B 20040193 CZ eng V - Research Report
Matoušek, Rudolf - Honzík, Petr
SDIO Interface for the FPSLIC.
Praha: ÚTIA AV ČR, 2004. 6 s. Research Report, 2118.
R&D Projects: GA MŠMT LN00B096
Grant - others:RECONF2(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * dynamic reconfiguration * embedded HW
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0013563 - 2.0106380 - UTIA-B 20040192 CZ eng V - Research Report
Kadlec, Jiří - Daněk, Martin - Honzík, Petr
Reconfigurable Scrolling Demo.
Praha: ÚTIA AV ČR, 2004. 3 s. Research Report, 2117.
R&D Projects: GA ČR GA102/04/2137
Grant - others:RECONF2(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * dynamic reconfiguration * embedded HW
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0013562 - 3.0106379 - UTIA-B 20040191 CZ eng V - Research Report
Kadlec, Jiří - Daněk, Martin - Honzík, Petr
Reconfigurable 24-Bit Floating-Point Coprocessor Demo.
Praha: ÚTIA AV ČR, 2004. 9 s. Research Report, 2116.
R&D Projects: GA ČR GA102/04/2137
Grant - others:RECONF2(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * dynamic reconfiguration * embedded HW
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0013561 - 4.0106378 - UTIA-B 20040190 CZ eng V - Research Report
Honzík, Petr
Getting Started with AVG-GCC.
Praha: ÚTIA AV ČR, 2004. 7 s. Research Report, 2115.
R&D Projects: GA ČR GA102/04/2137
Grant - others:RECONF2(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * dynamic reconfiguration * embedded HW
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0013560 - 5.0106373 - UTIA-B 20040185 CZ eng V - Research Report
Honzík, Petr
Communication Library for AVR Microcontrollers.
Praha: ÚTIA AV ČR, 2004. 4 s. Research Report, 2110.
R&D Projects: GA ČR GA102/04/2137
Grant - others:RECONF2(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * dynamic reconfiguration * embedded HW
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0013555