Search results
- 1.0411373 - UTIA-B 20050103 RIV BE eng C - Conference Paper (international conference)
Daněk, Martin - Heřmánek, Antonín - Honzík, Petr - Kadlec, Jiří - Matoušek, Rudolf - Pohl, Zdeněk
GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs.
[GIN - záznamník pro slepce: Příklad využití dynamické rekonfigurace na FPGA.]
Ghent: HiPEAC Network of Excellence, 2005. ISBN 90-382-0802-2. In: ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems. - (Bosschere, K.), s. 15-18
[ACACES 2005. L'Aquila (IT), 26.07.2005]
R&D Projects: GA MŠMT 1M0567
Grant - others:Commission EC(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z10750506
Keywords : dynamic reconfiguration * FPGA * HW/SW codesign
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131455 - 2.0411372 - UTIA-B 20050102 RIV BE eng C - Conference Paper (international conference)
Bartosinski, Roman - Daněk, Martin - Honzík, Petr - Matoušek, Rudolf
Dynamic reconfiguration in FPGA-based SoC designs.
[Dynamická rekonfigurace v SoC návrhu s obvody FPGA. Dynamická rekonfigurace v SoC návrhu s obvody FPGA.]
Ghent: HiPEAC Network of Excellence, 2005. ISBN 90-382-0802-2. In: ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems. - (Bosschere, K.), s. 35-38
[ACACES 2005. L'Aquila (IT), 26.07.2005]
R&D Projects: GA MŠMT 1M0567
Grant - others:Commission EC(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z10750506
Keywords : dynamic reconfiguration * FPGA * HW/SW codesign
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131454 - 3.0411311 - UTIA-B 20050039 RIV HU eng C - Conference Paper (international conference)
Bartosinski, Roman - Daněk, Martin - Honzík, Petr - Matoušek, Rudolf
Dynamic reconfiguration in FPGA-based SoC designs.
[Dynamická rekonfigurace v FPGA systémech na jednom čipu.]
Sopron: University of West Hungary, 2005. ISBN 963-9364-48-7. In: Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems. - (Takách, G.; Hlawiczka, A.; Sziraj, J.), s. 129-136
[IEEE Design and Diagnostics of Electronic Circuits nad Systems Workshop (DDECS 2005) /8./. Sopron (HU), 13.04.2005-16.04.2005]
R&D Projects: GA MŠMT 1M0567
Grant - others:Commission EC(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z10750506
Keywords : FPGA * dynamic reconfiguration
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131394 - 4.0411173 - UTIA-B 20030160 RIV GB eng C - Conference Paper (international conference)
Matoušek, Rudolf - Pohl, Zdeněk - Daněk, Martin - Kadlec, Jiří
Dynamic reconfiguration of Atmel FPGAs.
Southampton: University of Southampton, 2003. In: UK ACM SIGDA 3rd Workshop on Electronic Design Automation. - (Hettiaratchi, S.), s. 1-4
[UK ACM SIGDA Workshop on Electronic Design Automation /3./. Southampton (GB), 11.09.2003-12.09.2003]
Grant - others:Commission EC(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : dynamic reconfiguration * FPGA * Virtex-VHDL
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131259 - 5.0411124 - UTIA-B 20030111 RIV CZ eng C - Conference Paper (international conference)
Matoušek, Rudolf - Pohl, Zdeněk - Daněk, Martin - Kadlec, Jiří
Dynamic reconfiguration of FPGAs.
Prague: Czech Technical University, 2003. ISBN 80-86645-05-3. In: Recent Trends in Multimedia Information Processing. Proceedings. - (Šimák, B.; Zahradník, P.), s. 288-291
[International Workshop on Systems, Signals and Image Processing /10./. Praha (CZ), 10.09.2003-11.09.2003]
Grant - others:EU IST(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : dynamic reconfiguration * FPGA * CAD
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131211 - 6.0411119 - UTIA-B 20030106 RIV CZ eng C - Conference Paper (international conference)
Matoušek, Rudolf - Daněk, Martin - Pohl, Zdeněk - Kadlec, Jiří
Dynamic runtime partial reconfiguration in FPGA.
Liberec: Technical University, 2003. ISBN 80-7083-708-X. In: ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals. - (Nouza, J.; Drábková, J.), s. 294-298
[ECMS 2003 /6./. Liberec (CZ), 02.06.2003-04.06.2003]
Grant - others:EU IST(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * runtine dynamic reconfiguration * VHDL
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131206 - 7.0411039 - UTIA-B 20030026 RIV US eng C - Conference Paper (international conference)
Pohl, Zdeněk - Matoušek, Rudolf - Kadlec, Jiří - Tichý, Milan - Líčko, M.
Lattice adaptive filter implementation for FPGA.
Monterey: ACM, 2003. ISBN 1-58113-651-X. In: FPGA 2003 ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays., s. 246
[FPGA 2003. Monterey (US), 23.02.2003-25.02.2003]
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : lattice adaptive filter * FPGA
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131126 - 8.0410974 - UTIA-B 20020188 RIV CZ eng C - Conference Paper (international conference)
Líčko, Miroslav - Métais, B. - Tichý, Milan - Matoušek, Rudolf
Extension for Xilinx System Generator - logarithmic arithmetic blockset.
Praha: VŠCHT, 2002. ISBN 80-7080-500-5. In: MATLAB 2002. Sborník příspěvků 10. ročníku konference., s. 280-284
[MATLAB 2002. Praha (CZ), 07.11.2002]
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : Xilinx System Generator * field programmable gate arrays * MATLAB/Simulink
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131061 - 9.0410868 - UTIA-B 20020082 RIV CZ eng C - Conference Paper (international conference)
Matoušek, Rudolf - Líčko, Miroslav - Heřmánek, Antonín - Softley, C.
Floating-Point-Like Arithmetic for FPGA.
Praha: FEL ČVUT, 2002. In: POSTER 2002., s. 2
[International Student Conference on Electrical Engineering /6./. Praha (CZ), 23.05.2002]
R&D Projects: GA MŠMT LN00B096
Grant - others:ESPRIT(XE) 33544
Institutional research plan: CEZ:AV0Z1075907
Keywords : HSLA, RLS, LNS * IP core, DSP
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0130955 - 10.0410867 - UTIA-B 20020081 RIV DE eng C - Conference Paper (international conference)
Matoušek, Rudolf - Tichý, Milan - Pohl, Zdeněk - Kadlec, Jiří - Softley, C.
Logarithmic number system and floating-point arithmetics on FPGA.
Berlin: Springer, 2002. Lecture Notes in Computer Science., 2438. ISBN 3-540-44108-5. In: Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. - (Glesner, M.; Zipf, P.; Renovell, M.), s. 627-636
[International Conference FPL 2002 /12./. Montpellier (FR), 02.09.2002-04.09.2002]
R&D Projects: GA MŠMT LN00B096
Grant - others:ESPRIT(XE) 33544
Institutional research plan: CEZ:AV0Z1075907
Keywords : LNS, DSP, QRD * FPGA, HSLA, FPU
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0130954