Search results
- 1.0411001 - UTIA-B 20020215 CZ eng V - Research Report
Líčko, Miroslav - Schier, Jan - Pohl, Zdeněk - Kadlec, Jiří - Tichý, Milan - Matoušek, Rudolf - Heřmánek, Antonín
Logarithmic Arithmetic for Real Data Types and Support for MATLAB/SIMULINK Based Rapid-FPGA-Prototyping.
Praha: ÚTIA AV ČR, 2002. 7 s. Research Report, 2069.
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : rapid prototyping for FPGA * MATLAB/Simulink
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131088 - 2.0411000 - UTIA-B 20020214 CZ eng V - Research Report
Líčko, Miroslav
Fast Adaptive Controllers.
Praha: ÚTIA AV ČR, 2002. 21 s. Research Report, 2068.
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : recursive least-squares * least-squares lattice * recursive laguerre based LSL
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131087 - 3.0410738 - UTIA-B 20010207 CZ eng V - Research Report
Kadlec, Jiří - Heřmánek, Antonín - Softley, Ch. - Matoušek, Rudolf - Líčko, Miroslav
32-bit Logarithmic ALU for Handel-C 2.1 and Celoxica DK1.
Praha: ÚTIA AV ČR, 2001. 12 s. Research Report, 2037.
R&D Projects: GA MŠMT LN00B096
Grant - others:ESPRIT(XE) HSLA 33544
Institutional research plan: AV0Z1075907
Keywords : field programmable logarithmic array * digital signal processing
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0130826 - 4.0410737 - UTIA-B 20010206 CZ eng V - Research Report
Heřmánek, Antonín - Kadlec, Jiří - Matoušek, Rudolf - Líčko, Miroslav - Softley, Ch.
Pipelined Logarithmic 32bit ALU for Celoxica DK1.
Praha: ÚTIA AV ČR, 2001. 11 s. Research Report, 2034.
R&D Projects: GA MŠMT LN00B096
Grant - others:ESPRIT(XE) HSLA 33544
Institutional research plan: AV0Z1075907
Keywords : FPGA * embedded computer * hardware compilation
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0130825 - 5.0410730 - UTIA-B 20010199 CZ eng V - Research Report
Matoušek, Rudolf - Líčko, Miroslav - Heřmánek, Antonín - Softley, Ch.
Floating-Point-Like Arithmetic for FPGA.
Praha: ÚTIA AV ČR, 2001. 7 s. Research Report, 2039.
R&D Projects: GA MŠMT LN00B096
Grant - others:ESPRIT(XE) HSLA 33544
Institutional research plan: AV0Z1075907
Keywords : floating point * FPGA * digital signal processing
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0130818 - 6.0410660 - UTIA-B 20010129 CZ eng V - Research Report
Kadlec, Jiří - Matoušek, Rudolf - Líčko, Miroslav
FPGA Implementation of Logarithmic Unit Core.
Praha: ÚTIA AV ČR, 2001. 8 s. Research Report, 2007.
Grant - others:ESPRIT(XE) HSLA 33544
Institutional research plan: AV0Z1075907
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0130748