Search results
- 1.0411208 - UTIA-B 20030195 RIV CZ eng E - Electronic Document
Líčko, Miroslav - Matulík, Radim - Matoušek, Rudolf - Kadlec, Jiří
Prototyping Board for CAK. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 150 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * hardware prototyping
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131294 - 2.0411205 - UTIA-B 20030192 RIV CZ eng E - Electronic Document
Líčko, Miroslav - Kadlec, Jiří
An Introduction to the Xilinx System Generator. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 67.3 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * rapid prototyping * design methodology
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131291 - 3.0411203 - UTIA-B 20030190 RIV CZ eng E - Electronic Document
Matoušek, Rudolf - Líčko, Miroslav - Kadlec, Jiří
European Logarithmic Microprocessor. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 46.5 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : ELM * ELM * FPGA
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131289 - 4.0411193 - UTIA-B 20030180 RIV CZ eng E - Electronic Document
Pohl, Zdeněk - Kadlec, Jiří - Líčko, Miroslav - Matoušek, Rudolf - Tichý, Milan
Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 32 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : RLS Lattice * FPGA * noise cancelation
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131279