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Simple hardware implementation of voltage balancing in capacitor-clamped inverter
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SYSNO ASEP 0335309 Document Type J - Journal Article R&D Document Type Journal Article Subsidiary J Ostatní články Title Simple hardware implementation of voltage balancing in capacitor-clamped inverter Title Jednoduchá hardwarová implementace algoritmu pro balancování napětí na střídači s plovoucími kondenzátory Author(s) Kokeš, Petr (UT-L) RID
Semerád, Radko (UT-L) RIDSource Title Acta Technica CSAV. - : Ústav termomechaniky AV ČR, v. v. i. - ISSN 0001-7043
Roč. 54, č. 4 (2009), s. 325-341Number of pages 17 s. Language eng - English Country CZ - Czech Republic Keywords capacitor-clamped multilevel inverter ; flying capacitor voltage balancing ; pulse width modulation (PWM) Subject RIV JA - Electronics ; Optoelectronics, Electrical Engineering R&D Projects FT-TA4/077 GA MPO - Ministry of Industry and Trade (MPO) CEZ AV0Z20570509 - UE-C, UT-L (2005-2011) Annotation The basic principle of voltage balancing in capacitor-clamped voltage source inverters (VSIs) is explained and a simple balancing algorithm, which is very suitable for hardware implementation, is proposed. The function of the suggested algorithm is verified in all usual steady and transient states of the induction motor drive by computer simulations of an 850 kW drive and also by experiments on a small 2.2 kW drive. The unbalancing across flying caps can occur only due to very fast transients in dc link. The balancing method is designed to preserve all benefits of the standard space-vector modulation and simultaneously to prevent an increase in VSI average switching frequency above the PWM carrier frequency. Workplace Institute of Thermomechanics Contact Marie Kajprová, kajprova@it.cas.cz, Tel.: 266 053 154 ; Jana Lahovská, jaja@it.cas.cz, Tel.: 266 053 823 Year of Publishing 2010
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