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Implementing floating-point DSP
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SYSNO ASEP 0040181 Document Type J - Journal Article R&D Document Type Journal Article Subsidiary J Ostatní články Title Implementing floating-point DSP Title Implementace DSP v aritmetice s plovoucí řádovou čárkou Author(s) Kadlec, Jiří (UTIA-B) RID
Chappel, S. (GB)Source Title Embedded Magazine
Roč. 2, č. 3 (2006), s. 12-14Number of pages 3 s. Language eng - English Country US - United States Keywords PicoBlaze ; floating point ; FPGA Subject RIV JC - Computer Hardware ; Software R&D Projects 1ET400750406 GA AV ČR - Academy of Sciences of the Czech Republic (AV ČR) 1M0567 GA MŠMT - Ministry of Education, Youth and Sports (MEYS) CEZ AV0Z10750506 - UTIA-B (2005-2011) Annotation In this article we demonstrate the use of PicoBlazeTM controllers for the assembly of high performance and power efficient floating point DSP pipelines. We decompose floating point algorithm into a sequence of hardware processes using a PicoBlazeTM network to manage the operation sequence. Workplace Institute of Information Theory and Automation Contact Markéta Votavová, votavova@utia.cas.cz, Tel.: 266 052 201. Year of Publishing 2007
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