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Top-down lower bounds for depth 3 circuits
- 1.Hastad, J. - Jukna, S. - Pudlák, Pavel
Top-down lower bounds for depth 3 circuits.
Proceeding of IEEE FOCS. IEEE, 1993, s. 124-129.
[FOCS. Palo Alto (US), 03.11.1993-05.11.1993]
R&D Projects: GA AV ČR IAA119107
http://hdl.handle.net/11104/0071019
Number of the records: 1