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A Comparison of FPGA Implementation of the A Priori Error-Feedback LSL Algorithm using Logarithmic Arithmetic
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SYSNO 0410735 Title A Comparison of FPGA Implementation of the A Priori Error-Feedback LSL Algorithm using Logarithmic Arithmetic Author(s) Albu, F. (IE)
Kadlec, Jiří (UTIA-B) RID
Matoušek, Rudolf (UTIA-B)
Heřmánek, Antonín (UTIA-B)
Coleman, J. N. (GB)Issue data Praha: ÚTIA AV ČR, 2001 Edition Research Report , 2035 Document Type Výzkumná zpráva Grant HSLA 33544, XE - EU countries LN00B096 GA MŠMT - Ministry of Education, Youth and Sports (MEYS) CEZ 1075907 Language eng Country CZ Keywords LSL Algorithm * FPGA * digital signal processing Permanent Link http://hdl.handle.net/11104/0130823
Number of the records: 1