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Embedded Development Environment for a Family of Xilinx FPGA
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SYSNO ASEP 0090568 Document Type A - Abstract R&D Document Type The record was not marked in the RIV R&D Document Type Není vybrán druh dokumentu Title Embedded Development Environment for a Family of Xilinx FPGA Title Prostředí pro návrh vestavných systémů na programovatelných obvodech Xilinx Author(s) Kadlec, Jiří (UTIA-B) RID Source Title Regional Conference on Embedded and Ambient Systems Book of Abstracts. - Budapešť : John von Neumann Computer Society, 2007 / Varga Antila K. ; Kiss Ákos ; Marsiske Stefan ; Vásárhelyi József - ISBN 978-963-8431-96-7
S. 16-16Number of pages 1 s. Action RCEAS 2007 First Regional Conference on Embedded and Ambient Systems Event date 22.11.2007-24.11.2007 VEvent location Budapešť Country HU - Hungary Event type EUR Language eng - English Country HU - Hungary Keywords FPGA ; PicoBlaze ; Embedded systems Subject RIV JC - Computer Hardware ; Software R&D Projects 1M0567 GA MŠMT - Ministry of Education, Youth and Sports (MEYS) 1ET400750406 GA AV ČR - Academy of Sciences of the Czech Republic (AV ČR) CEZ AV0Z10750506 - UTIA-B (2005-2011) Annotation In this article we present development environment for Xilinx FPGA MicroBlaze-centric applications with floating point HW accelerators. Platform is nicknamed UtiaDsp91. The accelerators of this platforms are reconfigurable in runtime by change of the firmware of PicoBlaze controllers embedded in each accelerator. Generation of SW drivers and automated generation of final FPGA netlists is based on our extensions of the standard tool chain of Xilinx (System Generator 9.1, EDK 9.1 and ISE 9.1). Workplace Institute of Information Theory and Automation Contact Markéta Votavová, votavova@utia.cas.cz, Tel.: 266 052 201. Year of Publishing 2008
Number of the records: 1