Number of the records: 1  

EDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI

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    SYSNO ASEP0391650
    Document TypeA - Abstract
    R&D Document TypeThe record was not marked in the RIV
    R&D Document TypeNení vybrán druh dokumentu
    TitleEDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI
    Author(s) Kadlec, Jiří (UTIA-B) RID
    Number of authors1
    Source Title2013 Design, Automation and Test in Europe. - Grenoble, 2013
    Number of pages1 s.
    Publication formOnline - E
    ActionDATE 2013 Design, Automation and Test in Europe
    Event date2013.03.18-2013.03.22
    VEvent locationGrenoble
    CountryFR - France
    Event typeEUR
    Languageeng - English
    CountryFR - France
    KeywordsFPGA ; programmable accelerators ; computer video processing
    Subject RIVJC - Computer Hardware ; Software
    R&D Projects7H12004 GA MŠMT - Ministry of Education, Youth and Sports (MEYS)
    AnnotationPresentation of the EdkDSP reprogrammable floating point accelerators on the Xilinx Kintex FPGA (KC705) together with the HDMI video I/O (ON Semiconductor Image sensor/HDMI 1080p60). Presented SoC is using the 512 bit wide AXI-4 buses and several independent VDMA controllers.
    WorkplaceInstitute of Information Theory and Automation
    ContactMarkéta Votavová, votavova@utia.cas.cz, Tel.: 266 052 201.
    Year of Publishing2014
Number of the records: 1  

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