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EDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI
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SYSNO ASEP 0391650 Document Type A - Abstract R&D Document Type The record was not marked in the RIV R&D Document Type Není vybrán druh dokumentu Title EDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI Author(s) Kadlec, Jiří (UTIA-B) RID Number of authors 1 Source Title 2013 Design, Automation and Test in Europe. - Grenoble, 2013 Number of pages 1 s. Publication form Online - E Action DATE 2013 Design, Automation and Test in Europe Event date 2013.03.18-2013.03.22 VEvent location Grenoble Country FR - France Event type EUR Language eng - English Country FR - France Keywords FPGA ; programmable accelerators ; computer video processing Subject RIV JC - Computer Hardware ; Software R&D Projects 7H12004 GA MŠMT - Ministry of Education, Youth and Sports (MEYS) Annotation Presentation of the EdkDSP reprogrammable floating point accelerators on the Xilinx Kintex FPGA (KC705) together with the HDMI video I/O (ON Semiconductor Image sensor/HDMI 1080p60). Presented SoC is using the 512 bit wide AXI-4 buses and several independent VDMA controllers. Workplace Institute of Information Theory and Automation Contact Markéta Votavová, votavova@utia.cas.cz, Tel.: 266 052 201. Year of Publishing 2014
Number of the records: 1