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Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping
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SYSNO ASEP 0411202 Document Type C - Proceedings Paper (int. conf.) R&D Document Type Conference Paper Title Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping Author(s) Pohl, Zdeněk (UTIA-B) RID
Schier, Jan (UTIA-B) RID
Líčko, Miroslav (UTIA-B)
Heřmánek, Antonín (UTIA-B)
Tichý, Milan (UTIA-B)Issue data Los Alamitos: IEEE Computer Society Press, 2003 ISBN 0-7695-1926-1 Source Title Proceedings of the International Parallel and Distributed Processing Symposium. IPDPS 2003 / Werner B. Pages s. 1-6 Publication form CD-ROM - CD-ROM Action IEEE IPDPS 2003 Event date 22.04.2003-26.04.2003 VEvent location Nice Country FR - France Event type WRD Language eng - English Country US - United States Keywords high speed logarithmic arithmetic ; Matlab/Simulink ; rapid prototyping Subject RIV JC - Computer Hardware ; Software R&D Projects LN00B096 GA MŠMT - Ministry of Education, Youth and Sports (MEYS) CEZ AV0Z1075907 - UTIA-B Annotation The paper is focused on the rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using the Xilinx system Generator is reviewed on an example of the High Speed Logaritmic Arithmetic unit. An alternative approach using the combination of the real time workshop with the Handel C compiler for automatized generation of the HDL code is presented. The possibilities to extend this solution in order to support the run-time reconfigurations are outlined. Workplace Institute of Information Theory and Automation Contact Markéta Votavová, votavova@utia.cas.cz, Tel.: 266 052 201.
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