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Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping

  1. 1.
    SYSNO ASEP0411202
    Document TypeC - Proceedings Paper (int. conf.)
    R&D Document TypeConference Paper
    TitleLogarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping
    Author(s) Pohl, Zdeněk (UTIA-B) RID
    Schier, Jan (UTIA-B) RID
    Líčko, Miroslav (UTIA-B)
    Heřmánek, Antonín (UTIA-B)
    Tichý, Milan (UTIA-B)
    Issue dataLos Alamitos: IEEE Computer Society Press, 2003
    ISBN0-7695-1926-1
    Source TitleProceedings of the International Parallel and Distributed Processing Symposium. IPDPS 2003 / Werner B.
    Pagess. 1-6
    Publication formCD-ROM - CD-ROM
    ActionIEEE IPDPS 2003
    Event date22.04.2003-26.04.2003
    VEvent locationNice
    CountryFR - France
    Event typeWRD
    Languageeng - English
    CountryUS - United States
    Keywordshigh speed logarithmic arithmetic ; Matlab/Simulink ; rapid prototyping
    Subject RIVJC - Computer Hardware ; Software
    R&D ProjectsLN00B096 GA MŠMT - Ministry of Education, Youth and Sports (MEYS)
    CEZAV0Z1075907 - UTIA-B
    AnnotationThe paper is focused on the rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using the Xilinx system Generator is reviewed on an example of the High Speed Logaritmic Arithmetic unit. An alternative approach using the combination of the real time workshop with the Handel C compiler for automatized generation of the HDL code is presented. The possibilities to extend this solution in order to support the run-time reconfigurations are outlined.
    WorkplaceInstitute of Information Theory and Automation
    ContactMarkéta Votavová, votavova@utia.cas.cz, Tel.: 266 052 201.

Number of the records: 1  

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