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A frequency locked loop strategy for synchronization of inverters used in distributed energy sources
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SYSNO ASEP 0503249 Document Type J - Journal Article R&D Document Type Journal Article Subsidiary J Článek ve WOS Title A frequency locked loop strategy for synchronization of inverters used in distributed energy sources Author(s) Šimek, Petr (UT-L) RID
Škramlík, Jiří (UT-L)
Valouch, Viktor (UT-L) RIDSource Title International Journal of Electrical Power & Energy Systems. - : Elsevier - ISSN 0142-0615
Roč. 107, May (2019), s. 120-130Number of pages 11 s. Publication form Print - P Language eng - English Country US - United States Keywords cascaded delayed signal cancellation ; frequency locked loop ; frequency and phase jumps Subject RIV JA - Electronics ; Optoelectronics, Electrical Engineering OECD category Electrical and electronic engineering Method of publishing Limited access Institutional support UT-L - RVO:61388998 UT WOS 000458221700012 EID SCOPUS 85056998157 DOI 10.1016/j.ijepes.2018.11.004 Annotation A technique has been developed that incorporates the advantages of the cascaded delayed signal cancellation and dual second order generalized integrator schemes, the first one being used now as a pre-filter for the second element. A reconstructor block is applied as well to prevent unreal changes in the estimated frequency in case of phase angle jumps of the grid voltage. Experimental results are evaluated in terms of quality of the positive voltage sequence, frequency and phase angle identification for the grid voltage disturbed by harmonic and negative sequence components as well as for amplitude, frequency, and phase angle jumps in the voltage. Workplace Institute of Thermomechanics Contact Marie Kajprová, kajprova@it.cas.cz, Tel.: 266 053 154 ; Jana Lahovská, jaja@it.cas.cz, Tel.: 266 053 823 Year of Publishing 2020 Electronic address https://www.sciencedirect.com/science/article/pii/S0142061518306586?via%3Dihub
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