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Optimization of finite interval CMA implementation for FPGA
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SYSNO 0411508 Title Optimization of finite interval CMA implementation for FPGA Title Optimalizace FPGA implementace FI-CMA algoritmu Author(s) Heřmánek, Antonín (UTIA-B)
Schier, Jan (UTIA-B) RID
Šůcha, P. (CZ)
Hanzálek, Z. (CZ)Source Title Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005. s. 1-6. - Athens, 2005 : IEEE ISBN 0-7803-9334-1 Conference SiPS 2005. IEEE Workshop on Signal Processing Systems, Athens, 02.11.2005-04.11.2005 Document Type Konferenční příspěvek (zahraniční konf.) Grant 1ET300750402 GA AV ČR - Academy of Sciences of the Czech Republic (AV ČR) 1M0567 GA MŠMT - Ministry of Education, Youth and Sports (MEYS) CEZ AV0Z10750506 - UTIA-B (2005-2011) Language eng Country GR Keywords CMA * FPGA * logarithmic arithmetic * cyclic scheduling Permanent Link http://hdl.handle.net/11104/0131588
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