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Formalizing, Analyzing and Extending the Model of Bulk Synchronous Parallel Computer
- 1.0404160 - UIVT-O 20000247 CZ eng V - Research Report
Beran, Martin
Formalizing, Analyzing and Extending the Model of Bulk Synchronous Parallel Computer.
Prague: ICS AS CR, 2000. 92 s. Technical Report, V-829.
R&D Projects: GA ČR GA201/00/1489
Institutional research plan: AV0Z1030915
Keywords : model of computation * parallel computers * parallel algorithms * BSP * dBSP * machine classes * pipelining
Permanent Link: http://hdl.handle.net/11104/0124427
File Download Size Commentary Version Access v829-00.pdf 9 699.5 KB Other open-access
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