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Lattice adaptive filter implementation for FPGA
- 1.0411039 - UTIA-B 20030026 RIV US eng C - Conference Paper (international conference)
Pohl, Zdeněk - Matoušek, Rudolf - Kadlec, Jiří - Tichý, Milan - Líčko, M.
Lattice adaptive filter implementation for FPGA.
Monterey: ACM, 2003. ISBN 1-58113-651-X. In: FPGA 2003 ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays., s. 246
[FPGA 2003. Monterey (US), 23.02.2003-25.02.2003]
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : lattice adaptive filter * FPGA
Subject RIV: JC - Computer Hardware ; Software
Our poster introduces an innovative RLS Lattice filter implementation for FPGAs. The signal processing applications typically require wide numeric range, and that poses a problem when using an FPGA implementation. Our aaproach is based on arithmetic using logarithmic numeric representation (LNS). The test application - adaptive noise canceller - has been optimized for the Xilinx Virtex devices. It consumes roughly 70% of all logic resources of the XCV800 device and all block memory cells.
Permanent Link: http://hdl.handle.net/11104/0131126
Number of the records: 1