Pipelined logarithmic 32bit ALU for Celoxica DK1

0410671 - UTIA-B 20010140 CZ eng K - Conference Paper (Czech conference)
Heřmánek, Antonín - Kadlec, Jiří - Matoušek, Rudolf - Líčko, Miroslav - Pohl, Zdeněk
Pipelined logarithmic 32bit ALU for Celoxica DK1.
Praha: VŠCHT, 2001. ISBN 80-7080-446-7. In: Sborník příspěvků 9.ročníku konference MATLAB 2001. - (Procházka, A.; Uhlíř, J.), s. 72-80
[MATLAB 2001 /9./. Praha (CZ), 11.10.2001]
Grant - others:ESPRIT(XE) HSLA 33544
Institutional research plan: AV0Z1075907
Subject RIV: JC - Computer Hardware ; Software

This paper presents and compares two possible solution for floating point-like HW, based on a 32bit logarithmic ALU. There are described the implementation, parametres nad the basic use of a non-pipelined ALU. Both Virtex FPGA cores are encapsulated in function like API interface compatible with Handel-C 2.1 and the new DK1 tool from Celoxica.
Permanent Link: http://hdl.handle.net/11104/0130759