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Reconfigurable 24-Bit Floating-Point Coprocessor Demo
- 1.0106379 - UTIA-B 20040191 CZ eng V - Research Report
Kadlec, Jiří - Daněk, Martin - Honzík, Petr
Reconfigurable 24-Bit Floating-Point Coprocessor Demo.
Praha: ÚTIA AV ČR, 2004. 9 s. Research Report, 2116.
R&D Projects: GA ČR GA102/04/2137
Grant - others:RECONF2(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z1075907
Keywords : FPGA * dynamic reconfiguration * embedded HW
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0013561
Number of the records: 1