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0411372 - UTIA-B 20050102 RIV BE eng C - Conference Paper (international conference)
Bartosinski, Roman - Daněk, Martin - Honzík, Petr - Matoušek, Rudolf
Dynamic reconfiguration in FPGA-based SoC designs.
[Dynamická rekonfigurace v SoC návrhu s obvody FPGA. Dynamická rekonfigurace v SoC návrhu s obvody FPGA.]
Ghent: HiPEAC Network of Excellence, 2005. ISBN 90-382-0802-2. In: ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems. - (Bosschere, K.), s. 35-38
[ACACES 2005. L'Aquila (IT), 26.07.2005]
R&D Projects: GA MŠMT 1M0567
Grant - others:Commission EC(XE) IST-2001-34016
Institutional research plan: CEZ:AV0Z10750506
Keywords : dynamic reconfiguration * FPGA * HW/SW codesign
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131454