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0411193 - UTIA-B 20030180 RIV CZ eng E - Electronic Document
Pohl, Zdeněk - Kadlec, Jiří - Líčko, Miroslav - Matoušek, Rudolf - Tichý, Milan
Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program).
[program]. - Praha: ÚTIA AV ČR, 2003, 32 MB
R&D Projects: GA MŠMT LN00B096
Institutional research plan: CEZ:AV0Z1075907
Keywords : RLS Lattice * FPGA * noise cancelation
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0131279