0040204 - ÚTIA 2007 RIV CZ eng C - Conference Paper (international conference)
Kadlec, Jiří - Daněk, MartinDesign and verification methodology for reconfigurable designs in Atmel FPSLIC.
[Metody návrhu a verifikace pro rekonfigurovatelné návrhy v obvodu Atmel FPSLIC.]
Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems. Prague: Czech Technical University, 2006 - (Reorda, M.; Novák, O.; Straube, B.), s. 79-80. ISBN 1-4244-0184-4.
[DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems. Prague (CZ), 18.04.2006-21.04.2006]
R&D Projects: GA ČR GA102/04/2137
EU Projects: European Commission(XE) 027611 - AETHER
Grant - others:Commission EC(XE) IST-2001-34016
Program: FP6
Institutional research plan: CEZ:AV0Z10750506
Keywords : FPGA * dynamic reconfiguration * FPSLIC * floating-point IP cores * design flow
Subject RIV: JC - Computer Hardware ; Software
Permanent Link: http://hdl.handle.net/11104/0134004
