Abstract
Abstraction is one of the most important approaches for reducing the number of states in formal verification. An important abstraction technique is the usage of three-valued logic, extensible to bit-vectors. The best abstract bit-vector results for movement and logical operations can be computed quickly. However, for widely-used arithmetic operations, efficient algorithms for computation of the best possible output have not been known up to now.
In this paper, we present new efficient polynomial-time algorithms for abstract addition and multiplication with three-valued bit-vector inputs. These algorithms produce the best possible three-valued bit-vector output and remain fast even with 32-bit inputs.
To obtain the algorithms, we devise a novel modular extreme-finding technique via reformulation of the problem using pseudo-Boolean modular inequalities. Using the introduced technique, we construct an algorithm for abstract addition that computes its result in linear time, as well as a worst-case quadratic-time algorithm for abstract multiplication. Finally, we experimentally evaluate the performance of the algorithms, confirming their practical efficiency.
This work was supported by the Czech Technical University (CTU) grant No. SGS20/211/OHK3/3T/18 and institutional financing of the Institute of Computer Science (RVO:67985807).
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References
Arndt, J.: Bit wizardry. In: Arndt, J. (ed.) Matters Computational, pp. 2–101. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-14764-7_1
Boros, E., Hammer, P.L.: Pseudo-Boolean optimization. Discret. Appl. Math. 123(1), 155–225 (2002)
Clarke, E.M., Henzinger, T.A., Veith, H.: Introduction to model checking. In: Handbook of Model Checking, pp. 1–26. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-10575-8_1
Cousot, P., Cousot, R.: Systematic design of program analysis frameworks. In: Proceedings of the 6th ACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages, POPL ’79, pp. 269–282. Association for Computing Machinery, New York (1979). https://doi.org/10.1145/567752.567778
Institute of Electrical and Electronics Engineers: IEEE standard multivalue logic system for VHDL model interoperability (std_logic_1164). IEEE Std 1164–1993 pp. 1–24 (1993)
Kleene, S.C.: On notation for ordinal numbers. The Journal of Symbolic Logic 3(4), 150–155 (1938)
Noll, T., Schlich, B.: Delayed nondeterminism in model checking embedded systems assembly code. In: Yorav, K. (ed.) HVC 2007. LNCS, vol. 4899, pp. 185–201. Springer, Heidelberg (2008). https://doi.org/10.1007/978-3-540-77966-7_16
Onderka, J.: Deadline verification using model checking. Master’s thesis, Czech Technical University in Prague, Faculty of Information Technology (2020). http://hdl.handle.net/10467/87989
Onderka, J.: Operation checker for fast three-valued abstract bit-vector arithmetic (2021). Companion artifact to this paper
Regehr, J., Reid, A.: HOIST: a system for automatically deriving static analyzers for embedded systems. SIGOPS Oper. Syst. Rev. 38(5), 133–143 (2004)
Reinbacher, T., Horauer, M., Schlich, B.: Using 3-valued memory representation for state space reduction in embedded assembly code model checking. In: 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits Systems, pp. 114–119 (2009)
Reps, T., Thakur, A.: Automating abstract interpretation. In: Jobstmann, B., Leino, K.R.M. (eds.) VMCAI 2016. LNCS, vol. 9583, pp. 3–40. Springer, Heidelberg (2016). https://doi.org/10.1007/978-3-662-49122-5_1
Skiena, S.S.: Introduction to algorithm design. In: Skiena, S.S. (ed.) The Algorithm Design Manual, pp. 3–30. Springer, London (2008). https://doi.org/10.1007/978-1-84800-070-4_1
Yamane, S., Konoshita, R., Kato, T.: Model checking of embedded assembly program based on simulation. IEICE Trans. Inf. Syst. E100.D(8), 1819–1826 (2017)
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Onderka, J., Ratschan, S. (2022). Fast Three-Valued Abstract Bit-Vector Arithmetic. In: Finkbeiner, B., Wies, T. (eds) Verification, Model Checking, and Abstract Interpretation. VMCAI 2022. Lecture Notes in Computer Science(), vol 13182. Springer, Cham. https://doi.org/10.1007/978-3-030-94583-1_12
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DOI: https://doi.org/10.1007/978-3-030-94583-1_12
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