Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique

Heřmánek, Antonín - Kuneš, Michal - Tichý, Milan
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique.
Proceedings of the International Conference on Field Programmable Logic and Applications. Piscataway: IEEE, 2010, s. 336-339. ISBN 978-0-7695-4179-2.
[20th International Conference on Field Programmable Logic and Applications. Milano (IT), 31.08.2010-02.09.2010]
http://library.utia.cas.cz/separaty/2010/ZS/kunes-reducing power consumption of an embedded dsp platform through the clock-gating technique.pdf
http://hdl.handle.net/11104/0187684