Počet záznamů: 1
Computers in phase locked loops (PLL) design
- 1.0303660 - URE-Y 20000058 RIV SK eng C - Konferenční příspěvek (zahraniční konf.)
Kroupa, Věnceslav František - Štursa, Jarmil
Computers in phase locked loops (PLL) design.
Bratislava: Department of Radio and Electronics, FEI STU Bratislava, 2000. ISBN 80-227-1389-9. In: Radioelektronika 2000. Conference Proceedings. - (Ondráček, O.; Drobná, I.; Prokopová, I.), s. II.14-I0.17
[Radioelektronika'2000 /10./. Bratislava (SK), 12.09.2000-13.09.2000]
Grant CEP: GA ČR GA102/00/0958
Výzkumný záměr: CEZ:AV0Z2067918
Klíčová slova: phase locked loops * frequency synthesizers * Bode diagrams
Kód oboru RIV: JA - Elektronika a optoelektronika, elektrotechnika
In the contribution are shown advantages of computer simulation of the Bode plots. This technique provides much quicker and more precise information about the gain and phase margins of the investigated PLL. It is pointed out that computer plotting of the open loop gain G(s) can also provide information about PLL transfer functions H(s) and 1-H(s), and about noise properties in respect to the used VCO (voltage controlled oscillator).
Trvalý link: http://hdl.handle.net/11104/0113848
Počet záznamů: 1